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OVM/UVM Verilog ASIC/SOC Excellent Oral And Written Communication Skills Design Valid
 
Requirement id 109973
Job title Consultant
Job location in Irvine, CA
Skills required OVM/UVM, Verilog, ASIC/SOC, Excellent Oral And Written Communication
Open Date 11-Sep-2020
Close Date
Job type Direct Hire
Duration 6 Months
Compensation DOE
Status requirement ---
Job interview type Phone Screening
   Email Recruiter: coolsoft
Job Description Consultant: OVM/UVM, Verilog, ASIC/SOC, Excellent Oral And Written Communication

Note:

* On-site/Remote: On-site

* Interview: Phone or video call

* Locals required: yes

* LOCAL CANDIDATES ONLY.

Requirements

Minimum education:
Master
Years of work experience:
8 year(s)

Responsibilities

Position Description Summary

Netlist is looking for an exceptional RTL design engineer to work on complex digital IC projects. The engineer will work in a team-oriented environment to understand specifications, write verification plans from scratch, improve existing verification plans, and advance the verification infrastructure based on state-of-the-art methodologies and tools.

LOCAL CANDIDATES ONLY.

Responsibilities

Project team leadership
Design environment and process setup and maintenance
Generation of well-documented, power efficient and synthesis friendly RTL
Write comprehensive verification/test plans to the block(s) under ownership
Develop, design integrated memory and storage SoCs subsystems
Excellent knowledge of RTL design, verification and time closure
Strong understanding of SoC design challenges
Programming /scripting languages like C/C++, Perl, Unix/Linux is preferred
Demonstrated ability to innovate and make architectural and design trade-offs for balancing performance/power/area of designs
Work on logic synthesis and static timing analysis
Work with backend and layout engineers on chip-level floor-planning, power planning, macro and standard cell placement, clock tree synthesis, design rule checks and post-layout timing analysis

Experience and Education

BSEE/BSCS/BSCE degree and 7-10 years of related experience, an MSEE/MSCS/MSCE degree and 5-8 years of related experience
The ideal candidate has a proven track record of successfully collaborating with architecture and verification teams to design, code and verify PCIe controllers, memory controllers ( DDR3/4, LPDDR3/4), flash controllers (SLC/MLC/TLC NAND flash and FTL), embedded processors, high performance IPs and/or SOC designs
Strong experience with PCIe interface, designing, coding, and verifying at the module level, and integrated microcontroller subsystem
Skilled at debugging, fixing, and validating pre- and post-silicon IP/sub-system logic issues and bugs
Familiar with design environments, process flow, tool suites, methodologies and optimization methods

PHYSICAL DEMANDS OR REQUIREMENTS

Physical demands for an office position and heavy computer use
General skills
Must have

OVM/UVM
Verilog
ASIC/SOC

Languages

Must have

English Native or bilingual proficiency
 
Call 502-379-4456 Ext 100 for more details. Please provide Requirement id: 109973 while calling.
 
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(Consultant: OVM/UVM, Verilog, ASIC/SOC, Excellent Oral And Written Communication in Irvine, CA)
     
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